T2M-IP, a global semiconductor IP provider and ASIC services partner, today announced the global availability of its complete RISC-V CPU IP portfolio, spanning ultra-low-power MCU-class cores to ...

The set of six branches containing SoC and platform updates/additions for the Linux 6.19 kernel have been merged for enabling a lot of new RISC-V and ARM 64-bit hardware as well as enhancing some ...

C-DAC’s dual-core RISC‑V chip marks a milestone for India’s semiconductor ambitions, with Linux support and a roadmap to Dhanush variants ...

The Linux kernel remains the beating heart of the OS. In 2026, we’ll likely see: New Long-Term Support (LTS) Baselines: With releases like 6.18 already declared LTS and successor branches maturing, ...

QEMU 10.2 revises security policies, modernizes the crypto subsystem, and accelerates asynchronous I/O under Linux.

Built by Sensia Technology, it was thin enough to hang like a tapestry or slip under bedding. Volume was modest, audio ...

Here are five projects that are worth opening your wallet for. RISC-V, which is pronounced “risk five,” is an open-source ...

India’s DHRUV64 is a 1.0 GHz, 64-bit dual-core microprocessor aimed at strategic autonomy and critical infrastructure, not consumer benchmarks ...

No details on power consumption, lots of patriotic pride India’s Centre for Development of Advanced Computing (CDAC) on ...

From a technical standpoint, DHRUV64 is a modern 64-bit processor built on the open RISC-V architecture. Its dual-core design running at up to 1.0 GHz enables higher efficiency and better multitasking ...

C-DAC is aligning its futuristic vision with a concise and clear roadmap in these emerging technology domains. In the current ...

At least that’s the idea behind the Bit-Brick Cluster K1. Real-world performance will obviously vary depending on the task. But for applications that support parallel processing, this cluster board ...